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 PD - 93983A
REPETITIVE AVALANCHE AND dv/dt RATED
HEXFET TRANSISTORS SURFACE MOUNT (LCC-18)
Product Summary
Part Number IRFE120 BVDSS 100V RDS(on) 0.30 ID 4.5A
(R)
IRFE120 JANTX2N6788U REF:MIL-PRF-19500/555 100V, N-CHANNEL
LCC-18
The leadless chip carrier (LCC) package represents the logical next step in the continual evolution of surface mount technology. Desinged to be a close replacement for the TO-39 package, the LCC will give designers the extra flexibility they need to increase circuit board density. International Rectifier has engineered the LCC package to meet the specific needs of the power market by increasing the size of the bottom source pad, thereby enhancing the thermal and electrical performance. The lid of the package is grounded to the source to reduce RF interference.
Features:
n n n n n n n n
Surface Mount Small Footprint Alternative to TO-39 Package Hermetically Sealed Dynamic dv/dt Rating Avalanche Energy Rating Simple Drive Requirements Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25C ID @ VGS = 10V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction Storage Temperature Range Pckg. Mounting Surface Temp. Weight For footnotes refer to the last page 4.5 2.8 18 14 0.11 20 0.242 2.2 1.4 5.5 -55 to 150 300 (for 5s) 0.42(typical)
Units
A W W/C V mJ A mJ V/ns C g
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1
08/03/07
IRFE120, JANTX2N6788U
Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified)
Parameter
BVDSS BVDSS/TJ RDS(on) VGS(th) g fs IDSS Drain-to-Source Breakdown Voltage Temperature Coefficient of Breakdown Voltage Static Drain-to-Source On-State Resistance Gate Threshold Voltage Forward Transconductance Zero Gate Voltage Drain Current
Min
100 -- -- -- 2.0 1.5 -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- 0.10 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 6.1 -- -- 0.30 0.35 4.0 -- 25 250 100 -100 18 4.0 9.0 40 70 40 70 -- V V/C V S A nA nC
Test Conditions
VGS = 0V, ID = 1.0mA Reference to 25C, ID = 1.0mA VGS = 10V, ID = 2.8A VGS = 10V, ID = 4.5A VDS = VGS, ID = 250A VDS > 15V, IDS = 2.8A V DS = 80V, VGS = 0V VDS = 80V VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VGS = 10V, ID = 4.5A VDS = 50V VDD = 35V, ID = 4.5A VGS = 10V, RG = 7.5
IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance
ns nH
Measured from the center of drain pad to center of source pad VGS = 0V, VDS = 25V f = 1.0MHz
C iss C oss Crss
Input Capacitance Output Capacitance Reverse Transfer Capacitance
-- -- --
350 150 24
-- --
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD trr Q RR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- 4.5 18 1.8 240 2.0 A V ns C
Test Conditions
Tj = 25C, IS = 4.5A, VGS = 0V Tj = 25C, IF = 4.5A, di/dt 100A/s VDD 50V
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC RthJ-PCB Junction to Case Junction to PC Board
Min Typ Max
-- -- -- -- 8.93 26
Units
C/W
Test Conditions
Soldered to a copper clad PC board
Note: Corresponding Spice and Saber models are available on International Rectifier Website. For footnotes refer to the last page
2
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IRFE120, JANTX2N6788U
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRFE120, JANTX2N6788U
13 a & b
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFE120, JANTX2N6788U
V DS V GS RG VGS
Pulse Width 1 s Duty Factor 0.1 %
RD
D.U.T.
+
-V DD
Fig 10a. Switching Time Test Circuit
VDS 90%
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFE120, JANTX2N6788U
15V
VDS
L
DRIVER
RG
D.U.T
IAS tp
+ - VDD
A
VGS 20V
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
10 V
QGS
QGD
VGS
3mA
D.U.T.
+ V - DS
VG
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFE120, JANTX2N6788U
Foot Notes:
Repetitive Rating; Pulse width limited by
maximum junction temperature.
ISD 4.5A, di/dt 110A/s, VDD 100V, TJ 150C
Suggested RG =7.5
VDD = 25V, starting TJ = 25C,
Peak IL = 2.2A, L = 100H
Pulse width 300 s; Duty Cycle 2%
Case Outline and Dimensions -- LCC-18
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 08/2007
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